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Hello. I bought an ECLYPSE Z7 board some time ago. I was working on a project where I was interfacing some external peripherals on PMODs of the board. The board has suddenly been turned off and not powering up anymore. Kindly guide me in this. To figure out what is the cause and how can it be corrected. Seems like the custom power IC isn't turning on Thanks

Dear Sir, I would like to re-create the zmod_adc_dac vivado project. I have follow this link But it seems can not recreate the Vivado project. Error below: (more info and please see log.txt) can't read "assoc": no such variable ERROR: [BD 41-1273] Error running post_config_ip TCL procedure: can't read "assoc": no such variable update_assoc_busif Line 6 Best Regards, Paul log.txt

刚刚Eclypse Z7,似乎是一个很酷board, hoping to build some projects that focus on low latency servos. Interested in additional information on the Eclypse z7 Syzygy Ports to be used with the Syzygy ADC and DAC. Could any provide additional information about.... Any example to get started? Calibration with MCU? Is there direct access pins to the AD9717 DIN_AWG pins through the Syzgy? Syzgy pins out for the ADC and DAC? Thanks Kevin From constraint file for Eclypse Z7: ## Syzygy Port A #set_property -dict { PACKAGE_PIN N20 } [get_ports { SYZYGY_A_C2P_CLK_N }]; #IO_L14N_T2_SRCC Sch=syzygy_a_c2p_clk_n #set_property -dict { PACKAGE_PIN N19 } [get_ports { SYZYGY_A_C2P_CLK_P }]; #IO_L14P_T2_SRCC Sch=syzygy_a_c2p_clk_p #set_property -dict { PACKAGE_PIN T17 } [get_ports { SYZYGY_A_D_N[0] }]; #IO_L21N_T3_DQS Sch=syzygy_a_d_n[0] #set_property -dict { PACKAGE_PIN T16 } [get_ports { SYZYGY_A_D_P[0] }]; #IO_L21P_T3_DQS Sch=syzygy_a_d_p[0] #set_property -dict { PACKAGE_PIN T19 } [get_ports { SYZYGY_A_D_N[1] }]; #IO_L22N_T3 Sch=syzygy_a_d_n[1] #set_property -dict { PACKAGE_PIN R19 } [get_ports { SYZYGY_A_D_P[1] }]; #IO_L22P_T3 Sch=syzygy_a_d_p[1] #set_property -dict { PACKAGE_PIN T18 } [get_ports { SYZYGY_A_D_N[2] }]; #IO_L23N_T3 Sch=syzygy_a_d_n[2] #set_property -dict { PACKAGE_PIN R18 } [get_ports { SYZYGY_A_D_P[2] }]; #IO_L23P_T3 Sch=syzygy_a_d_p[2] #set_property -dict { PACKAGE_PIN P18 } [get_ports { SYZYGY_A_D_N[3] }]; #IO_L20N_T3 Sch=syzygy_a_d_n[3] #set_property -dict { PACKAGE_PIN P17 } [get_ports { SYZYGY_A_D_P[3] }]; #IO_L20P_T3 Sch=syzygy_a_d_p[3] #set_property -dict { PACKAGE_PIN R16 } [get_ports { SYZYGY_A_D_N[4] }]; #IO_L24N_T3 Sch=syzygy_a_d_n[4] #set_property -dict { PACKAGE_PIN P16 } [get_ports { SYZYGY_A_D_P[4] }]; #IO_L24P_T3 Sch=syzygy_a_d_p[4] #set_property -dict { PACKAGE_PIN P15 } [get_ports { SYZYGY_A_D_N[5] }]; #IO_L19N_T3_VREF Sch=syzygy_a_d_n[5] #set_property -dict { PACKAGE_PIN N15 } [get_ports { SYZYGY_A_D_P[5] }]; #IO_L19P_T3 Sch=syzygy_a_d_p[5] #set_property -dict { PACKAGE_PIN K18 } [get_ports { SYZYGY_A_D_N[6] }]; #IO_L7N_T1 Sch=syzygy_a_d_n[6] #set_property -dict { PACKAGE_PIN J18 } [get_ports { SYZYGY_A_D_P[6] }]; #IO_L7P_T1 Sch=syzygy_a_d_p[6] #set_property -dict { PACKAGE_PIN K21 } [get_ports { SYZYGY_A_D_N[7] }]; #IO_L9N_T1_DQS Sch=syzygy_a_d_n[7] #set_property -dict { PACKAGE_PIN J20 } [get_ports { SYZYGY_A_D_P[7] }]; #IO_L9P_T1_DQS Sch=syzygy_a_d_p[7] #set_property -dict { PACKAGE_PIN M20 } [get_ports { SYZYGY_A_P2C_CLK_N }]; #IO_L13N_T2_MRCC Sch=syzygy_a_p2c_clk_n #set_property -dict { PACKAGE_PIN M19 } [get_ports { SYZYGY_A_P2C_CLK_P }]; #IO_L13P_T2_MRCC Sch=syzygy_a_p2c_clk_p #set_property -dict { PACKAGE_PIN L19 } [get_ports { SYZYGY_A_S[16] }]; #IO_L12N_T1_MRCC Sch=syzygy_a_s[16] #set_property -dict { PACKAGE_PIN K20 } [get_ports { SYZYGY_A_S[17] }]; #IO_L11N_T1_SRCC Sch=syzygy_a_s[17] #set_property -dict { PACKAGE_PIN L18 } [get_ports { SYZYGY_A_S[18] }]; #IO_L12P_T1_MRCC Sch=syzygy_a_s[18] #set_property -dict { PACKAGE_PIN K19 } [get_ports { SYZYGY_A_S[19] }]; #IO_L11P_T1_SRCC Sch=syzygy_a_s[19] #set_property -dict { PACKAGE_PIN L22 } [get_ports { SYZYGY_A_S[20] }]; #IO_L10N_T1 Sch=syzygy_a_s[20] #set_property -dict { PACKAGE_PIN J22 } [get_ports { SYZYGY_A_S[21] }]; #IO_L8N_T1 Sch=syzygy_a_s[21] #set_property -dict { PACKAGE_PIN L21 } [get_ports { SYZYGY_A_S[22] }]; #IO_L10P_T1 Sch=syzygy_a_s[22] #set_property -dict { PACKAGE_PIN J21 } [get_ports { SYZYGY_A_S[23] }]; #IO_L8P_T1 Sch=syzygy_a_s[23] #set_property -dict { PACKAGE_PIN N22 } [get_ports { SYZYGY_A_S[24] }]; #IO_L16P_T2 Sch=syzygy_a_s[24] #set_property -dict { PACKAGE_PIN P22 } [get_ports { SYZYGY_A_S[25] }]; #IO_L16N_T2 Sch=syzygy_a_s[25] #set_property -dict { PACKAGE_PIN M21 } [get_ports { SYZYGY_A_S[26] }]; #IO_L15P_T2_DQS Sch=syzygy_a_s[26] #set_property -dict { PACKAGE_PIN M22 } [get_ports { SYZYGY_A_S[27] }]; #IO_L15N_T2_DQS Sch=syzygy_a_s[27] eclypse-z7-master.xdc