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How to setup Xilinx MIPI D-PHY to decode Pcam 5C camera signals


joerg_s
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    Hello,

    I'm using a Zybo Z7-20 board together with the Pcam 5C camera module and I have a question regarding the MIPI D-PHY settings in the Zybo-Z7-20-pcam-5c project.
    I want to replace the Digilent MIPI_D_PHY_RX with the Xilinx MIPI D-DPHY.

    My issue is, that the Xilinx MIPI D-PHY does not output any AXI-Stream signals and that I see permanent 'Start-of-Transmission (SoT) Error' (errsoths = '1') reported on the output port of the Xilinx MIPI D-PHY. This error occurs, according to the Xilinx MIPI D-PHY datasheet, when the HS_SETTLE parameter is not matching. The standard HS_SETTLE parameter in the Xilinx MIPI D-PHY is 145ns. The DPHY_LaneSFEN.vhd file, which is part of the Digilent MIPI D-PHY, uses a constant named 'kTHSSettle' which is set to 85ns.

    即使我设置Xilinx MIPI D-PHY使用HS_SETTLE time of 85ns, I still see the 'Start-of-Transmission Error' reported by the Xilinx MIPI D-PHY.

    The camera setup is done by the Digilent pcam_vdma_hdmi application which configures the camera to run in the standard 1080p30 setup mode (2-MIPI lanes, with 420 Mbps/lane).

    Xilinx MIPI D-Phy的设置是什么,以解码从PCAM 5C相机板接收到的2车道MIPI信号?

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    您在正确的轨道上。控制低功率高速过渡的时间安排的设置需要在发射器和接收器之间匹配。如果您对其进行范围,在LP-10状态下触发并测量传感器切换到高速所需的时间会更容易。

    The following registers control the camera timing:

    //MIPI timing // [5]=0 T_LPX global timing select=auto pclk2x {0x4805, 0x10},//Default=0x10 //T_HS_ZERO = MIN HS ZERO + T_UI*MIN HS ZERO_UI //MIN HS ZERO H (ns) {0x4818, 0x00},//Default=0x00 //MIN HS ZERO L (ns) {0x4819, 0xFF},//Default=0x96 //MIN HS ZERO_UI {0x482A, 0x05},//Default=0x05 //T_HS_PREPARE = MIN HS PREPARE + T_UI*MIN HS PREPARE_UI //MIN HS PREPARE H (ns) {0x4826, 0x00},//Default=0x00 //MIN HS PREPARE L (ns) {0x4827, 0x32},//Default=0x32 //MIN HS PREPARE_UI {0x4831, 0x04},//Default=0x04

    We will get to publishing a Xilinx MIPI IP demo project eventually.

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    Thanks for your reply.

    I’m using the OV5640 initialization which can be found here:https://github.com/digilent/zybo-z7-20-pcam-5c/blob/master/sdk/pcam/pcam_vdma_hdmi/ov5640/ov5640.h
    在此文件中,未定义HS_ZERO和HS_PREPARE摄像机寄存器值。他们保留在摄像机数据表中提到的默认值:

    T_UI = 24 ns (Register value 0x4837) T_HS_ZERO = MIN_HS_ZERO + T_UI*MIN_HS_ZERO_UI = 0x96 ns + 24 ns * 0x05 = 150 ns + 120 ns = 270 ns T_HS_PREPARE = MIN_HS_PREPARE + T_UI*MIN_HS_PREPARE_UI = 0x32 ns + 24 ns * 0x04 = 50 ns + 96 ns = 146 ns HS_SETTLE = T_HS_ZERO + T_HS_PREPARE = 416 ns

    这比ktclksettle时间常数高,该时间常数可能定义了Digilent Mipi D-Phy中的HS_Settle。

    How did Digilent figure out the correct HS_SETTLE time? Only by measuring?

    Without having a scope to measure, what’s the actual value to use for the HS_SETTLE time?

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    令人沮丧的是,我永远找不到对相机使用的HS值跨分辨率持续工作的方程式。传感器数据表在此问题上并不完全详细。Xilinx MIPI DPHY IP支持将在一个月左右的时间内与Ultrascale+支持一起。您可以尝试在HS_ZERO的传感器中设置一个大价值,并尝试增加D-Phy RX中的HS_Settle,直到它起作用为止。

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    Like you said, there's no specific explanation for the HS_ZERO and HS_PREPARE registers in the camera datasheet.
    I don't know the ranges of HS_ZERO and HS_PREPARE that are accepted by the camera. That's why I try to avoid making changes there.

    I did some simple tests on the Xilinx MIPI D-PHY and programmed an automatic sweep from low to high HS_SETTLE values.
    Unfortunately I couldn't find a correct HS_SETTLE value. All of the values tested caused D-PHY errors.

    Zybo Z7-20板有一个Petalinux项目,其中包含用于MIPI解码和信号处理的Xilinx模块。
    Xilinx MIPI RX模块配置为2型泳道,800 Mbps和YUV422。我想这个项目旨在与OV5640传感器一起使用,对吗?

    Maybe I find there some settings on how to setup the camera or Xilinx MIPI D-PHY.

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